2017 Calendar of Events
July 19th, 2017
11:30am - 1:30pm
Lunch 'n Learn meeting
Clifton C. Miller Community Center, Tustin, CA
October 18th, 2017
11:30am - 1:30pm
Lunch 'n Learn meeting
November 8th, 2017
8:30am - 5pm
Advanced PCB Design Conference
Tustin Community Center @ The Market Place, Tustin, CA

Advanced PCB Design Conference

Save The Date! Spread the Word!

Wednesday, November 8th, 2017
8:30am to 5pm
Tustin Community Center @ The Market Place
2961 El Camino Real | Tustin, CA 92782

Educational Event will include breakfast & lunch, 8 presentations, raffles, sponsor tables, and networking.

Tickets for the Event can be purchased here:

Orange County IPC Designers Council Meeting Information

For our July Lunch 'n Learn meeting we're going to explore the advances in the technology of Embedded Passives, which can benefit many designs today. We have two guest speakers with informative presentations to educate us on this important and growing technology tend.

Wednesday, July 19th, 2017

11:30am – 1:30pm

Lunch served 11:30 - 11:50
Misc. Business 11:50 - 12:00
Presentation 12:00 - 1:20
Q & A discussion 1:20 - 1:25
Door prize raffle 1:25 - 1:30


Clifton C. Miller Community Center
300 Centennial Way
Tustin, CA 92780

Google MAP to our Meeting in Tustin

Embedded Thin Film Resistors
An update on current Applications and Design

Bruce Mahler
Vice President
Ohmega Technologies, Inc.
One of the PCB Designer's tools is the use of embedded passives. Embedded passives free up routing area, reduce assembly, improve reliability, improve electrical performance and for some designs, reduce the cost of the assembled board. OhmegaPly is an embedded resistive material that has seen growing use in a variety of electronic systems, including high frequency RF circuits, MEMs sensors and heater elements. This presentation will provide an overview of the Thin Film resistor technology including its production, product offerings and characteristics. Examples of current OhmegaPly designs will be reviewed and will be followed by a discussion of future trends for embedded resistors in PCB's.

Improving Power Delivery Networks (PDNs) Using Polyimide-based Thin Laminates

What PCB Designers need to know about Buried Capacitance

Jim-Hyun Hwang
Applications Development Engineer
This presentation will provide an overview of the use of thin laminate products (i.e. buried capacitance - a pair of power/ground layer pairs) designed for the power distribution design options. The presentation will discuss the use of both 1-mil and 0.5-mil dielectric laminates and the benefits of each. Buried capacitance layers can reduce the number of decoupling capacitors, free up design space, reduce noise and create higher reliability, along with many other benefits. Example stack-ups from high layer count PCBs used for server and telecommunications equipment will be shared. Also, process challenges at fabricators will be addressed.

Please RSVP no later than noon on Tuesday, July 18th, 2017
By Clicking the Reservation Link Below
E-Mail RSVP to: terri_kleekamp@mentor.com

Reserve a Spot on your Calendar for Thursday, July 19th from 11:30 am to 1:30 pm.
Don't miss out on this educational “Lunch ‘n Learn” event!
Hope you can attend!


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